Cisco IOS XR Fundamentals by Mobeen Tahir, Mark Ghattas, Dawit Birhanu, Syed Natif Nawaz

By Mobeen Tahir, Mark Ghattas, Dawit Birhanu, Syed Natif Nawaz

Cisco IOS XR basics is a scientific, authoritative advisor to configuring routers with Cisco IOS XR, the next-generation flagship Cisco web working process. during this publication, a group of Cisco specialists brings jointly speedy, authoritative, and example-rich reference info for all of the instructions most often used to configure and troubleshoot Cisco IOS XR-based routers in either merchant and firm environments.

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It has two major elements: line card chassis (LCC) and fabric card chassis (FCC). 2 Tbps and featuring a midplane design. It has 16 line card and 2 route processor slots. ■ CRS-1 8-Slot Single-Shelf System is an eight-slot line card chassis with total switching capacity of 640 Gbps and featuring a midplane design. It has eight line card and two route processor slots. ■ CRS-1 4-Slot Single-Shelf System is a four-slot line card shelf with total switching capacity of 320 Gbps. It has four line card and two route processor slots.

The following are the services provided by BCDL: ■ Downloads data using GSP. BCDL multicasts routing tables and label bindings to line cards over the fabric, and FGID tables to fabric cards over the Control Ethernet. FGID is used on the CRS-1 system because it uses a three-stage switch fabric. FGID is not used on XR12K or ASR9000 systems. ■ Handles card insertion or reload.

R U N R V C S E N D R E A D Y R E P L Y R E A D Y T I M E R U N R V C Client thread is scheduled to run. R U N Figure 2-5 Synchronous IPC With asynchronous communication, the sender and receiver are not tightly coupled. The sender is unblocked before the receiver processes the message. In fact, the sender does not know when the receiver processes the message that it sent. The sender can send multiple messages before the receiver processes any of the previously received messages. Although this has the advantage of higher throughput, it also has potential risk of overflowing the receiver buffer.

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